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High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
I
7206F
7206F
Logic Diagram
Memory
FEATURES:
* 16K x 9-bit organization * RAD-PAK(R) radiation-hardened against natural space radiation * A total dose hardness: - > 100 krad (Si), depending upon space mission * Excellent Single Event Effect - SELTH: > 100 MeV/mg/cm2 - SEUTH: = 7 MeV/mg/cm2 - SEU saturated cross section: 1.5E-5 cm2/bit Asynchronous Read/Write operation High speed CMOS epi technology Retransmit capability Propagation time (max access time): - 15 ns, 20 ns, 30 ns, 40 ns, 50 ns Status flag: empty, half-full, full Fully expandable in both word depth and width Bi-directional applications Low power Battery back-up operation TTL compatible Package: 28 pin RAD-PAK(R) flat package
DESCRIPTION:
Maxwell Technologies' 7206F high speed FIFO microcircuit features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. It is organized such that the data is read in the same sequential order that it was written. Full and Empty flags are provided to prevent overflow and underflow. The expansion logic allows unlimited expansion capability in work size and depth with no timing penalties. Twin address pointers automatically generate internal read and write addresses, and automatically increment with the write and read pin. The 7206F 9-bits wide data are used in data communications applications where a parity bit for error checking is necessary. The retransmit capability allows the read pointer to be reset to its initial position without affecting the write pointer. Maxwell Technologies' patented RAD-PAK(R) packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S.
* * * * * * * * * * *
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High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
TABLE 1. 7206F PINOUT DESCRIPTION
PIN 1 2-6 7 8 9 - 13 14 15 16 - 19 20 21 22 23 24 - 27 28 SYMBOL W I8, I3-I0 XI Write Enable Inputs Expansion In Full Flag Outputs Ground Read Enable Outputs Expansion Out/Half Full Flag Empty Flag Reset First Load/Retransmit Inputs Power Supply DESCRIPTION
7206F
FF
Q0 - Q3, Q8 GND R Q4 - Q7 XO/HF EF RS FL/RT I7 - I4 VCC
Memory
TABLE 2. 7206F ABSOLUTE MAXIMUM RATINGS
PARAMETER Positive Supply Voltage Input or Output Voltage Storage Temperature Range Operating Temperature Range SYMBOL VCC VIN TS TA MIN -0.3 GND -0.3 -65 -55 MAX 7.0 VCC +0.3 150 125 UNIT V V
C C
TABLE 3. 7206F RECOMMENDED OPERATING CONDITIONS
PARAMETER Positive Supply Voltage High Level Input Voltage Low Level Voltage Thermal Impedance Operating Temperature Range SYMBOL VCC VIH VIL TA MIN 4.5 2.2 ---55 MAX 5.5 -0.8 0.93 125 UNIT V V V C/W
C
JC
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
TABLE 4. 7206F DC ELECTRICAL CHARACTERISTICS
(VCC = 5V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Operating Supply Current -15 -20 -30 -40 -50 Standby Supply Current (R = W = RS = FLVRT = VIH) Power Down Current (All Input = VCC) Input Leakage Current (0.4V < VIN < VCC) Output Leakage Current (R = VIH, 0.4V < VOUT < VCC) Input Low Input High Voltage1 Voltage1 SYMBOL ICCOP MIN ----------2.2 -2.4 --MAX 165 160 150 140 130 5 400 1 1 0.8 -0.4 -10 10
7206F
UNIT mA
ICCSB ICCPD ILI ILO VIL VIH VOL VOH CIN COUT
mA A A A V V
Memory
Output Low Voltage (VCC min, IOL = 8mA) Output High Voltage (VCC min, IOH = -2mA) Input Capacitance
2 2
V V pF pF
Output Capacitance
1. VIH max = VCC + 0.3V. VIL min = -0.3V or -1.0V pulse width 50 ns. 2. Guaranteed by design.
TABLE 5. 7206F TIMING CHARACTERISTICS 1
(VCC = 5V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Read Cycle Read Cycle Time -15 -20 -30 -40 -50 Access Time -15 -20 -30 -40 -50 tRC ns 25 30 40 50 65 ----------ns 15 20 30 40 50 SYMBOL MIN MAX UNITS
tA
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
TABLE 5. 7206F TIMING CHARACTERISTICS 1
(VCC = 5V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Read Recovery Time -15 -20 -30 -40 -50 Read Pulse Width 2 -15 -20 -30 -40 -50 Read Low to Data Low-Z 3 -15 -20 -30 -40 -50 Write HIGH to Data Low-Z 3,4 -15 -20 -30 -40 -50 Data Valid from Read High -15 -20 -30 -40 -50 Read High to Data Bus High-Z 3 -15 -20 -30 -40 -50 SYMBOL tRR MIN 10 10 10 10 15 15 20 30 40 50 0 0 5 5 5 3 3 5 5 5 5 5 5 5 5 -----MAX ------
7206F
UNITS ns
tRPW
ns -----ns -----ns -----ns -----ns 15 15 20 25 30
tRLZ
Memory
tWLZ
tDV
tRHZ
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
TABLE 5. 7206F TIMING CHARACTERISTICS 1
(VCC = 5V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Write Cycle Write Cycle Time -15 -20 -30 -40 -50 Write Pulse Width 2 -15 -20 -30 -40 -50 Write Recovery Time -15 -20 -30 -40 -50 Data Set-up Time -15 -20 -30 -40 -50 Data Hold Time -15 -20 -30 -40 -50 Reset Cycle Reset Cycle Time -15 -20 -30 -40 -50 Reset Pulse Width 2 -15 -20 -30 -40 -50
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7206F
MAX UNITS ns
SYMBOL tWC
MIN
25 30 40 50 65 15 20 30 40 50 10 10 10 10 15 9 12 18 24 30 0 0 0 0 5
-----ns -----ns -----ns -----ns -----ns
tWPW
tWR
Memory
tDS
tDH
tRSC
25 30 40 50 65 15 20 30 40 50
-----ns ------
tRS
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
TABLE 5. 7206F TIMING CHARACTERISTICS 1
(VCC = 5V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Reset Set-up Time 3 -15 -20 -30 -40 -50 Reset Recovery Time -15 -20 -30 -40 -50 Retransmit Cycle Retransmit Cycle TIme -15 -20 -30 -40 -50 Retransmit Pulse Width 2 -15 -20 -30 -40 -50 Retransmit Set-up Time 3 -15 -20 -30 -40 -50 Retransmit Recovery Time -15 -20 -30 -40 -50 Flags Reset to EF Low -15 -20 -30 -40 -50
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7206F
MAX -----ns -----ns UNITS ns
SYMBOL tRSS
MIN 20 30 30 50 60 10 10 10 10 15
tRSR
tRTC
25 30 40 50 65 15 20 30 40 50 15 20 30 40 50 10 10 10 10 15
-----ns -----ns -----ns -----ns
Memory
tRT
tRTS
tRTR
tEFL
------
25 30 30 50 65
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
TABLE 5. 7206F TIMING CHARACTERISTICS 1
(VCC = 5V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Reset to HF/FF High -15 -20 -30 -40 -50 Read Low to EF Low -15 -20 -30 -40 -50 Read High to FF High -15 -20 -30 -40 -50 Read Pulse Width after EF High -15 -20 -30 -40 -50 Write High to EF High -15 -20 -30 -40 -50 Write Low to FF Low -15 -20 -30 -40 -50 Write Low to HF Flag Low -15 -20 -30 -40 -50 SYMBOL tHFH, tFFH MIN ---------------15 20 30 40 50 ---------------MAX 25 30 30 50 65
7206F
UNITS ns
tREF
ns 15 20 30 40 50 ns 17 20 30 40 50 ns -----ns 15 20 30 40 50 ns 20 20 30 40 50 ns 30 30 30 50 65
tRFF
Memory
tRPE
tWEF
tWFF
tWHF
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
TABLE 5. 7206F TIMING CHARACTERISTICS 1
(VCC = 5V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Read High to HF Flag High -15 -20 -30 -40 -50 Write Pulse Width after FF High -15 -20 -30 -40 -50 Read/Write LOW to XO LOW -15 -20 -30 -40 -50 Read/Write LOW to XO HIGH -15 -20 -30 -40 -50 XI Pulse Width -15 -20 -30 -40 -50 XI Recovery Time -15 -20 -30 -40 -50 XI Set-up Time -15 -20 -30 -40 -50 SYMBOL tRHF MIN -----15 20 30 40 50 ----------15 20 30 40 50 10 10 10 10 10 10 10 10 15 15 MAX 30 30 30 50 65
7206F
UNITS ns
tWPF
ns -----ns 15 20 30 40 50 ns 15 20 30 40 50 ns -----ns -----ns ------
tXOL
Memory
tXOH
tXI
tXIR
tXIS
1. VCC = +5V10%, TA = +25 C; use switching test circuit. AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and the output load circuit, unless otherwise specified.
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
2. Pulse widths less than minimum value are not allowed. 3. Values guaranteed by design, not currently tested. 4. Only applies to read data flow-through mode.
7206F
FIGURE 1. RESET
Memory
FIGURE 2. ASYNCHRONOUS WRITE AND READ OPERATION
FIGURE 3. FULL FLAG TIMING FROM LAST WRITE TO FIRST READ
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
FIGURE 4. EMPTY FLAG TIMING FROM LAST READ TO FIRST WRITE
7206F
FIGURE 5. RETRANSMIT
Memory
FIGURE 6. EMPTY FLAG TIMING
FIGURE 7. FULL FLAG TIMING
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
FIGURE 8. HALF-FULL FLAG TIMING
7206F
FIGURE 9. EXPANSION OUT
Memory
FIGURE 10. EXPANSION IN
FIGURE 11. READ DATA FLOW FOR THROUGH MODE
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
FIGURE 12. WRITE DATA FLOW FOR THROUGH MODE
7206F
Memory
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
7206F
Memory
28 PIN RAD-PAK(R) FLAT PACKAGE
SYMBOL MIN A b c D E E1 E2 E3 e L Q S1 N 0.390 0.021 0.005 0.129 0.015 0.004 -0.400 -0.180 0.005 DIMENSION NOM 0.142 0.017 0.005 0.720 0.410 -0.250 0.080 0.050 BSC 0.400 0.033 0.067 28 0.410 0.045 -MAX 0.155 0.022 0.009 0.740 0.420 0.440 ---
F28-07 Note: All dimensions in inches
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
Important Notice:
7206F
These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies' products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies' liability shall be limited to replacement of defective parts.
Memory
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All data sheets are subject to change without notice
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(c)2001 Maxwell Technologies All rights reserved.
High-Speed Epi-CMOS (16K x 9-Bit) Parallel FIFO
Product Ordering Options
Model Number 7206F RP F X -XX Feature Access Time
7206F
Option Details
15 = 15 ns 20 = 20 ns 30 = 30 ns 40 = 40 ns 50 = 50 ns
Screening Flow
Monolithic S = Maxwell Class S B = Maxwell Class B E = Engineering (testing @ +25C) I = Industrial (testing @ -55C, +25C, +125C) F = Flat Pack
Memory
Package
Radiation Feature
RP = RAD-PAK(R) package
Base Product Nomenclature
High-Speed Epi-CMOS (16K x 9Bit) Parallel FIFO
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12.19.01 Rev 3
All data sheets are subject to change without notice
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(c)2001 Maxwell Technologies All rights reserved.

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